This week I once again wrote an interrupt service routine for a UART to do some serial communication. Actually I didn’t have to write a whole lot, because the receiver part had already been done by someone else, but the code for transmitting data under interrupt control was missing. I already had this code in another project and porting it was easy and quick, but then I started thinking.
Like me, probably thousands of programmers all over the world are doing this every day, which is a waste of time and resources. Of course we all try to reuse code as much as possible, but with micro-controllers getting more and more advanced, why don’t the silicon vendors simply implement the driver in the peripheral, in silicon? I mean, how many people do use the UART for other things than simply sending and receiving data? OK, we see more and more 16550 compatible UARTs, so drivers are easily found, but then again, why not put it in a ROM for the programmer’s convenience? All it has to do is to read data from a buffer and write data to it, all under interrupt control of course. An intelligent peripheral like that would save some code space, but most importantly, it would save lots of programmer’s time.
Such an intelligent peripheral would have a pretty simple interface: some registers to set up circular rx & tx buffers and the communication parameters, registers to read/write a block of data and some status registers to check for errors. The user only has to supply a block of RAM for the buffers. This is what most of us implement in our code anyway. For backward compatibility they should keep the traditional interface too, that way everything is possible.
Similar peripherals for other protocols could be integrated as well, like I2C or SPI.
The typical ISR for I2C is rather complicated and big, and is therefore prone to many bugs. Many software developers are struggling to get it working properly, so it would be a great service to them if the driver was already in the chip. I am not pleading for a full blown on-chip operating system, but some simple drivers that will take care of the most common tasks sure would be nice.
So you silicon vendors reading this please do give it a thought. I appreciate the integrated USB drivers, but don’t stop there. Why don’t you make things even better by adding hardcoded drivers for “simple” peripherals too?
Thursday, May 19, 2011
Wednesday, May 4, 2011
FRAM - true unified memory
Somewhere in the beginning of 2007 I won in a lottery held by EPN magazine an evaluation board from Ramtron sporting their most powerful 8051 clone, the VRS51L3074, which could be programmed and debugged with a small USB piggyback board. The very special thing of the Ramtron controller was the 8 KB of non-volatile ferroelectric memory (F-RAM) it included.
Instead of putting the board in a box, I actually used it in a project. I used the F-RAM to store some parameters in. The evaluation board also had several other F-RAM chips on it, but I did not use those. Once the project finished (it was published in the January 2009 issue of Circuit Cellar) I (almost) forgot about F-RAM and never heard from Ramtron again.
This year at the Embedded World show in Nuremberg I again came across F-RAM, now spelled FRAM, at the Fujitsu stand. It turned out that they started licensing the technology from Ramtron and that they had put some of it in their MB95R family of 8-bit MCUs. Fujitsu also offers stand-alone FRAM devices up to 4 Mbit.
This week Texas Instruments announced their brand-new MSP430FR57xx family that includes up to 16 KB of FRAM, licensed at the same source. The people at TI are very excited about it and have high expectations for the future.
So what exactly is FRAM and why would you be excited about it?
The F in FRAM stands for ferroelectric (and not ferromagnetic nor Fujitsu) because it “uses ferroelectric film as a capacitor for storing data. Possessing characteristics of both ROM and RAM devices, FRAM features high speed access, high endurance in write mode, low power consumption, non-volatility, and excellent tamper resistance.” (Source: Fujitsu)
How it all works at the atomic level is not so important here, let’s jump to the bits interesting for people wanting to use FRAM in a design.
First there is speed. Compared to flash memory FRAM is way faster, TI claims a 100 times faster. According to Fujitsu, FRAM is 30,000 times faster than EEPROM.
Secondly, there is power consumption. FRAM uses very little power, 250 (TI) to 400 (Fujitsu) times less than flash or EEPROM. This is active power. Interestingly enough FRAM has a slightly higher leakage current than flash memory, so power consumption in sleep mode is slightly worse.
Less energy and higher speed means cost savings, not only on the power budget, but also on the production budget for the high-volume people that measure the time it takes to program a device on the production line.
Then there is endurance. Flash & EEPROM memory cells are specified for some 10,000 write cycles, whereas a FRAM memory cell can be rewritten more than a trillion times! (Fujitsu is a bit conservative here, TI rather optimistic.) This kind of endurance combined with the higher speed means that FRAM can be used in place of SRAM.
FRAM works with low programming voltages down to 1.5 V. Replacing a block of flash memory by a block of FRAM of the same density then saves die space because FRAM doesn’t need a charge pump. Smaller means cheaper. Also, because of the low programming voltage new applications become possible where the higher flash programming voltages are currently considered dangerous.
Finally, FRAM is less sensitive to external fields and alpha particles than flash memory because the memory cell capacitor’s dielectric is much thinner than the one of a flash memory cell. The thinner the dielectric the less distance there is to develop a dV over and the smaller are the chances to (accidentally) modify a bit.
All these advantages were known from the start, so why did it take so long before FRAM made its way into non-Ramtron MCUs? Well, I don’t know about Fujitsu, but according to TI the main reason was the incompatibility of the technology. Five years ago FRAM was done in 350 nm technology, which was too big to use it in TI’s chips. Now they brought it down to 130 nm, which is a perfect fit.
This is a picture of a demo board showing off the low-power capabilities of the new MSP430 family, targeted at energy harvesting applications. Battery backed SRAM, flahs or EEPROM can all be replaced by FRAM, the speed and low power requirements of FRAM make external super caps unnecessary. Higher speed equates to shorter up times so ultra-super-low-power applications seem to be ideal.
Since anyone can license this technology from Ramtron, we can expect other parts from other manufacturers to appear in the next months or years.
Jeez, why didn’t I buy Ramtron stock at the time when nobody cared?
Instead of putting the board in a box, I actually used it in a project. I used the F-RAM to store some parameters in. The evaluation board also had several other F-RAM chips on it, but I did not use those. Once the project finished (it was published in the January 2009 issue of Circuit Cellar) I (almost) forgot about F-RAM and never heard from Ramtron again.
This year at the Embedded World show in Nuremberg I again came across F-RAM, now spelled FRAM, at the Fujitsu stand. It turned out that they started licensing the technology from Ramtron and that they had put some of it in their MB95R family of 8-bit MCUs. Fujitsu also offers stand-alone FRAM devices up to 4 Mbit.
This week Texas Instruments announced their brand-new MSP430FR57xx family that includes up to 16 KB of FRAM, licensed at the same source. The people at TI are very excited about it and have high expectations for the future.
So what exactly is FRAM and why would you be excited about it?
The F in FRAM stands for ferroelectric (and not ferromagnetic nor Fujitsu) because it “uses ferroelectric film as a capacitor for storing data. Possessing characteristics of both ROM and RAM devices, FRAM features high speed access, high endurance in write mode, low power consumption, non-volatility, and excellent tamper resistance.” (Source: Fujitsu)
How it all works at the atomic level is not so important here, let’s jump to the bits interesting for people wanting to use FRAM in a design.
First there is speed. Compared to flash memory FRAM is way faster, TI claims a 100 times faster. According to Fujitsu, FRAM is 30,000 times faster than EEPROM.
Secondly, there is power consumption. FRAM uses very little power, 250 (TI) to 400 (Fujitsu) times less than flash or EEPROM. This is active power. Interestingly enough FRAM has a slightly higher leakage current than flash memory, so power consumption in sleep mode is slightly worse.
Less energy and higher speed means cost savings, not only on the power budget, but also on the production budget for the high-volume people that measure the time it takes to program a device on the production line.
Then there is endurance. Flash & EEPROM memory cells are specified for some 10,000 write cycles, whereas a FRAM memory cell can be rewritten more than a trillion times! (Fujitsu is a bit conservative here, TI rather optimistic.) This kind of endurance combined with the higher speed means that FRAM can be used in place of SRAM.
FRAM works with low programming voltages down to 1.5 V. Replacing a block of flash memory by a block of FRAM of the same density then saves die space because FRAM doesn’t need a charge pump. Smaller means cheaper. Also, because of the low programming voltage new applications become possible where the higher flash programming voltages are currently considered dangerous.
Finally, FRAM is less sensitive to external fields and alpha particles than flash memory because the memory cell capacitor’s dielectric is much thinner than the one of a flash memory cell. The thinner the dielectric the less distance there is to develop a dV over and the smaller are the chances to (accidentally) modify a bit.
All these advantages were known from the start, so why did it take so long before FRAM made its way into non-Ramtron MCUs? Well, I don’t know about Fujitsu, but according to TI the main reason was the incompatibility of the technology. Five years ago FRAM was done in 350 nm technology, which was too big to use it in TI’s chips. Now they brought it down to 130 nm, which is a perfect fit.
This is a picture of a demo board showing off the low-power capabilities of the new MSP430 family, targeted at energy harvesting applications. Battery backed SRAM, flahs or EEPROM can all be replaced by FRAM, the speed and low power requirements of FRAM make external super caps unnecessary. Higher speed equates to shorter up times so ultra-super-low-power applications seem to be ideal.
Since anyone can license this technology from Ramtron, we can expect other parts from other manufacturers to appear in the next months or years.
Jeez, why didn’t I buy Ramtron stock at the time when nobody cared?
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